Nvidia released CUDA Toolkit 13.5 on November 4, and it moves Vera Rubin support from early developer access to general availability. Nvidia now describes the software stack for its next AI platform as ready for enterprise production. The release also confirms that Rubin GPUs will not support Tesla Compute Cluster (TCC) mode on Windows.
Nvidia laid out the changes in a CUDA 13.5 post on the NVIDIA Technical Blog by Jonathan Bentz. The list of features is long. This article sorts them by who needs to act and what to check before upgrading.
What changes for you
AI teams training or serving models on Vera Rubin
The cuBLAS math library gets updated heuristics and kernel tuning for NVFP4 and MXFP8 matrix math on Vera Rubin. NVFP4 and MXFP8 are low-precision number formats that speed up AI workloads. Nvidia says the tuning targets mixture-of-experts (MoE) training shapes, among others.
The practical benefit is less manual tuning. Nvidia says “training and inference workloads get higher throughput without per-shape autotuning.” The post does not give benchmark figures for these Vera Rubin gains, so teams should measure their own models.
Cluster admins who share GPUs between jobs
Multi-Process Service (MPS) v3 lets several processes share one GPU. CUDA 13.5 adds weighted timeslicing to it. Admins can give longer compute turns to MPS servers that host heavier workloads.
MPS v3 also adds load balancing for streaming multiprocessor (SM) partitions. A job can borrow idle SMs from another partition, and MPS takes them back before reassigning them. Applications still see a stable base partition size. Admins turn on borrowing with --max-chunks and lending with --shareable=true.
Two more MPS controls target shared clusters. Cgroup-based routing maps Linux cgroup v2 subtrees to MPS namespaces. Per-namespace SM partition assignments now take precedence over the CUDA_MPS_SM_PARTITION fallback. A new polling-based memory accounting mode is also available, but Nvidia notes it adds cost to each eviction decision.
Locality domains get two partition choices. Apps can request the same number of SMs in each domain for predictable sizing. They can also add the leftover SMs to their partitions to use all available compute. A discovery mode in cudaDevSmResourceSplit() reports how many SMs each partition actually received.
Windows users and software vendors
Nvidia states that “Tesla Compute Cluster (TCC) is not supported on Rubin and later GPUs.” Rubin supports only the WDDM and MCDM driver models on Windows. MCDM is the Microsoft driver model for compute-only devices. Nvidia advises users of TCC-dependent software to switch to a supported WDDM or MCDM setup.
Windows on Arm support, generally available since CUDA 13.4, now extends to NVIDIA DGX Station for Windows. cuBLAS also adds Windows on Arm support for Blackwell GPUs.
Anyone installing drivers
The toolkit does not ship a GPU driver. According to the CUDA Toolkit release notes, Nvidia stopped bundling the driver on Windows with CUDA 13.1 and on Linux with CUDA 13.4. You need to download it separately.
Nvidia published a new R620 data center driver on the same day. The R620 driver release notes list version 620.70.06 for Linux and 621.14 for Windows, both dated November 4. That driver requires DCGM 4.3.x or newer. It does not work with Attestation SDK versions older than 2026.10.02, which Nvidia calls an ABI breakage.
Hopper owners should check one more detail. On Hopper GPUs with subrevision 3, the driver fails to start if the VBIOS is older than 96.00.68.00.xx. The driver also makes Coherent Driver-based Memory Management (CDMM) the default on hardware-coherent platforms, while NUMA mode remains supported.
Who should check what before upgrading
| Group | What changes in CUDA 13.5 | What to check |
|---|---|---|
| Vera Rubin AI teams | GA support; tuned NVFP4 and MXFP8 cuBLAS kernels | Benchmark your own models, since Nvidia gave no figures |
| Shared GPU cluster admins | MPS v3 weighted timeslicing, SM borrowing, cgroup v2 routing | Review MPS settings and the MPS v3 interface guide |
| Windows compute users | No TCC on Rubin and later GPUs | Move tools and scripts to WDDM or MCDM |
| Data center operators | R620 driver 620.70.06 (Linux) and 621.14 (Windows) | DCGM 4.3.x or newer, Attestation SDK 2026.10.02 or newer, Hopper VBIOS |
| Build and tooling scripts | New cuobjdump symbol-table columns | Update scripts that parse cuobjdump output |
Admins can find the MPS details in Nvidia’s MPS v3 interface guide. The toolkit itself is on the CUDA downloads page.
Multi-GPU work inside a single kernel
CUDA Tile now lets a kernel read memory on other GPUs linked by NVLink, using unicast pointers. Multicast pointers and multimem operations go further. They support cross-GPU reductions and stores on NVSwitch fabrics with NVLink SHARP.
Why does this matter? Developers can mix GPU-to-GPU communication and math in the same kernel. That cuts the overhead of splitting the work into separate kernels. Nvidia names fused matrix multiplication and cross-GPU reduction as use cases.
A Tile-SIMT interop feature arrives as a public preview. Tile kernels can call SIMT library device functions for NVSHMEM, CCCL Coop, Warp and MathDx. Support for calling your own __device__ functions is planned for a future release. C++ users enable it with nvcc --tile-preview simt, and cuTile Python users with cuda.tile_preview.foreign_call.
New tools for tracking down slowdowns
Nsight Perf SDK for AI debuts as a public preview. It offers always-on profiling for long training and inference runs. Nvidia says it helps “investigate intermittent performance issues that can be difficult to reproduce.” Users can view the collected data in Perfetto.
Other tool updates are smaller but useful:
- Nsight Compute 2026.4 adds a timeline page for time-resolved profiling data.
- CUDA-GDB can stop on CUDA Driver log events, filtered by thread, severity or message pattern.
- GPU core dumps now work while CUPTI tracing is on.
- A Compute Sanitizer agent skill helps AI coding agents read memory, race and sync errors.
- Nsight Cloud adds OpenTelemetry trace integration and profiling for NVIDIA Dynamo deployments.
Library and compiler changes (technical details)
CUDA Python, Graphs and CCCL
CUDA Python’s cuda.core 1.2 adds copy_batch(), which sends several buffer copies through one driver call. It exposes Programmatic Dependent Launch on compute capability 9.0 and newer. Graph nodes can also change without rebuilding the whole graph. Stream capture now records existing cudaMemcpyBatchAsync calls with no code changes.
CCCL 3.5 adds public tuning APIs for CUB through cuda::execution::tune(...). A new cub::DeviceBatchedTopK picks the top K items across segments, and FlashInfer already uses it. CCCL 3.5 also brings reproducible floating-point scans and reductions that read element counts from device memory.
Math libraries
- cuBLAS: SYR2K, HER2K, SYRKX and HERKX run up to 1.5x faster on B200. Ozaki-II emulation extends to FP64 symmetric rank-k updates on Ampere and newer. BF16 kernels now cover unaligned shapes.
- cuSPARSE: FP32 and FP64 CSR SpMM with ALG3 runs 1.65x to 2.27x faster. The new SpSV ALG2 is 2.7x faster than ALG1 by geometric mean, and SpSV analysis is 2.79x faster. csrcolor is about 3x faster.
- nvJPEG: GPU Hybrid decode throughput rises by 10% to 600%, depending on image size and Huffman table use.
Compilers
The nvprune --precompile option compiles PTX and TileIR to native code during pruning. New __sin2pif, __cos2pif and __sincos2pif intrinsics arrive with matching PTX variants. The cuobjdump symbol table now uses descriptive Type, Bind, Vis and Other columns. Nvidia warns that scripts parsing these dumps will need updates.
What remains unclear
Nvidia has not published performance numbers for the Vera Rubin cuBLAS gains. The blog post also does not name specific Vera Rubin systems or state a minimum driver version for CUDA 13.5. Nvidia points readers to the CUDA 13.5 release notes for supported platforms and compatibility. Teams with Windows tools built around TCC should plan their move to WDDM or MCDM before Rubin hardware arrives.
